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HEXAFORCE CAN FD PLANNING GUIDE

6-Axis Force Sensor CAN FD Integration

Check six-axis payload fit and bus demand. CAN FD hardware and firmware require configuration review.

CAN FD bus planner

Estimate traffic and payload fit. Hardware timing remains unverified.

13.9% sensor demand · 138.8 µs/frame36 B required / 48 B selected · Payload fits; hardware unverifiedConfigure inputs ↓ Inspect results ↓
1. Traffic and payload
Range: 100–4000.
2. Topology review inputs
Range: 1–16, whole numbers.
Range: 0.5–50.
Range: 0–2.
Range: 50–500.

These record review context. No automatic topology certification or SSP register recommendation.

3. Encoding examples
Range: 10–200000.
Range: 0.1–10000.

Integer examples map ±span to ±32000 (Int16), ±8000000 (Int24) or ±2000000000 (Int32). Agree actual scales per axis. Float32 step is spacing near the entered span, not a constant LSB.

Planning results

PLANNING ONLY — HARDWARE REVIEW REQUIRED

Sensor traffic fits the selected wire-time budget only. Add all other messages and measure worst-case response times before setting deadlines.

Sensor traffic demand

13.9%

One node: 13.9%. Other traffic is excluded. Values above 100% indicate impossible demand.

Conservative frame allowance

138.8 µs

Nominal: 35.0 µs; data: 103.8 µs. Includes intermission, not waiting or retries.

Wire-only cycle balance

861.2 µs

Cycle 1000.0 µs minus all sensor frames. 50% budget rate: 3602 Hz/node; not a guaranteed control rate.

TDC / physical layer

Unverified

Local loop: 150 ns. Cable round trip: 30 ns (assumes 5 ns/m). Review TDC with the controller manual. SSP cannot be derived from these inputs.

Encoding step example

0.00006104 N

Torque: 0.000001907 N·m. Numerical encoding only; sensor noise, accuracy and dynamic range remain unknown.

Payload fit

36 / 48 B

75.0% used; remainder padding. Layout is illustrative and little-endian, not a released HexaForce protocol.

Assumptions and next checks

  • Planning estimate only: excludes arbitration waiting, other traffic, error frames, retries, ADC/filter delay and host scheduling. No jitter or control-safety guarantee.
  • Physical layer remains unverified. Check controller clock, bit segments, SJW, oscillator tolerances, local TXD-to-RXD delay and the actual transceiver/cable data sheets.
  • TDC uses local TXD-to-RXD delay, not trunk round-trip delay. SSP needs controller-specific clock quanta and limits; this planner does not generate register settings.
  • The 30/50/70% bands are editorial review thresholds. Even low utilization can miss a deadline due to blocking and message priorities.
  • Encoding step is not sensor resolution, noise, accuracy or usable dynamic range. Example force/torque spans do not define per-axis product ratings.
  • Both split termination and choke selection require bench validation. A choke or split capacitor does not certify signal integrity.
Inspect the reproducible calculation method ↓

Illustrative payload byte map

Proposed little-endian layout, not a firmware specification
OffsetBytesFieldTypeUnitsPurpose
0–12StatusWorduint16bitfieldIllustrative status flags; vendor definitions unconfirmed
2–32SequenceCountuint16counterModulo 65536; compare with restart and timeout state
4–74TimestampUsuint32µsProposed ADC timestamp; epoch, reset and clock synchronization must be agreed
8–114Fxfloat32NProposed little-endian signal; integer scales agreed per axis
12–154Fyfloat32NProposed little-endian signal; integer scales agreed per axis
16–194Fzfloat32NProposed little-endian signal; integer scales agreed per axis
20–234Mxfloat32N·mProposed little-endian signal; integer scales agreed per axis
24–274Myfloat32N·mProposed little-endian signal; integer scales agreed per axis
28–314Mzfloat32N·mProposed little-endian signal; integer scales agreed per axis
32–332TemperatureInternalint160.01 °CIllustrative telemetry, not a released sensor feature
34–352SupplyVoltageMvuint16mVIllustrative telemetry, not a released sensor feature
36–4712Paddinguint8[]rawReserved; zero fill by agreement
Request CAN FD technical review ↗

Reproduce a CAN FD planning example

Original browser capture, November 4, 2026: the default single-node example uses 1,000 samples/s, 1,000 kbps nominal and 5,000 kbps data rates, Float32 encoding and a 48 B payload, with both timestamp and auxiliary telemetry enabled. Required fields occupy 36 B. The model returns 138.8 µs/frame and 13.9% sensor demand, excluding other traffic.

CAN FD planner default output: 13.9% sensor demand, 138.8 microseconds per frame and 36 of 48 payload bytes
Real software execution with illustrative inputs; no physical sensor, firmware, customer result or topology qualification is demonstrated. The image crops the live summary only.

Remaining defaults: 3 m trunk, 0.1 m stub, 150 ns local loop delay, split termination and common-mode choke proposed; example spans ±1,000 N and ±30 N·m. These context values do not certify the topology or sensor accuracy. To reproduce, select Reset defaults in the planner and review calculated results; inspect the bit-budget method below.

Eight Decisions Before Connecting CAN FD to a Robot Controller

1. Size required fields before selecting payload

Six Float32 values, status and sequence require 28 B; adding a timestamp needs 32 B, and 4 B auxiliary telemetry needs 36 B, rounded to a 48 B wire payload.

Source basis: Linux CAN frame length model — include/linux/can/length.h. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

2. Agree scales and units per axis

Float32 is a numerical format, not a sensor accuracy claim. Integer examples need an explicit signed range, scale and offset for every force and torque axis.

Source basis: Oracle Numerical Computation Guide — IEEE Arithmetic, single format. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

3. Treat wire time as one part of latency

The planner budgets stuffing and intermission. Arbitration waiting, competing traffic, retries and host delays still need measurement and response-time analysis.

Source basis: Linux CAN frame length model — include/linux/can/length.h. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

4. Review TDC in controller clock units

Cable round-trip propagation is separate from local TXD-to-RXD delay. Without the controller clock and bit segments this page cannot recommend an SSP register value.

Source basis: Bosch M_CAN user manual, revision 3.3.1 (2023), sections 3.1.4–3.1.4.2. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

5. Qualify the actual physical topology

Use terminated trunk ends and short branches as a starting point. Split termination and chokes are design options, not automatic proof of operation at a selected rate.

Source basis: TI — CAN physical layer (2019). Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

6. Align clocks, not just timestamps

A payload timestamp can describe acquisition time only when its capture event, wrap, reset, epoch and clock relationship are agreed. Arrival time is a different event.

Source basis: Linux kernel documentation — SocketCAN. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

7. Benchmark the target Linux system

Record kernel, driver, adapter firmware and load. Socket options and a real-time scheduler do not establish a portable microsecond latency bound.

Source basis: Linux kernel documentation — SocketCAN. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

8. Confirm application protocol and release evidence

A proposed raw CAN FD layout or DBC does not establish CANopen FD interoperability, a compatible ROS driver or released product firmware.

Source basis: CiA — Standardized higher-layer protocols. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

1. Choose the transport against the integration task

Compare acquisition architecture and verification cost before choosing a bus. These are decision criteria, not measured protocol latency or price rankings.

Transport decision
Transport decisionTask and controllerAvailable release evidenceQualification cost

Compare complete acquisition paths, not unmeasured protocol latency.

1. Choose the transport against the integration task — technical reference criteria
Decision / itemKnown or illustrative basisLimit / unknownNext action
Raw CAN FDUp to 64 B payloadApplication schema and tooling must be agreedRequest firmware-matched protocol evidence
Classical CANUp to 8 B payloadSix Float32 values alone need three framesUse a sample counter and reassembly timeout
Existing EtherCAT systemMay fit an existing controller workflowNo cross-protocol cycle-time benchmark suppliedReview the released device description and master compatibility
Analog acquisitionCan reuse a qualified DAQNeeds channel timing, noise and grounding reviewCompare complete acquisition-chain cost

Source basis: Bosch M_CAN user manual, revision 3.3.1 (2023), sections 3.1.4–3.1.4.2 · Linux kernel documentation — SocketCAN. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

2. Pack six axes without dropping requested fields

One CAN FD frame can carry a coherent wrench record. Transport atomicity does not prove simultaneous ADC sampling. The following proposed little-endian layout is illustrative, not a released protocol.

Proposed payload fit
Proposed payload fitHeader + timestamp: 8 BSix Float32 axes: 24 BAux: 4 B → select 48 B

Without auxiliary fields the 32 B proposal fits. Not a released protocol.

2. Pack six axes without dropping requested fields — technical reference criteria
Decision / itemKnown or illustrative basisLimit / unknownNext action
Status + sequence2 B + 2 B = 4 BStatus flags are unconfirmedAgree bit definitions and modulo 65536 sequence
Six Float32 axes24 B, following the 4 B headerFx/Fy/Fz in N; Mx/My/Mz in N·m by agreementConfirm units, signs and sensor reference frame
TimestampOptional 4 B at offset 4Header + timestamp + axes = 32 BConfirm capture event and clock mapping
Auxiliary telemetryOptional 4 B after axes36 B total with timestamp; select 48 B, not 32 BPlanner withholds the map when any requested field cannot fit

Source basis: Linux CAN frame length model — include/linux/can/length.h · Bosch M_CAN user manual, revision 3.3.1 (2023), sections 3.1.4–3.1.4.2. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

3. Distinguish encoding granularity from sensor resolution

Use transport quantization to check representation loss. This does not replace measured noise, calibration uncertainty or overload limits. The tool’s spans are examples; actual scale factors are per axis.

Encoding and measurement
Encoding and measurementPer-axis range and unitsEncode / decode test vectorsCompare with measured noise

Numerical spacing is separate from sensor accuracy and dynamic range.

3. Distinguish encoding granularity from sensor resolution — technical reference criteria
Decision / itemKnown or illustrative basisLimit / unknownNext action
Float32 near 1000 NAdjacent-number spacing ≈ 0.000061035 NSpacing changes with exponent; accuracy remains unknownReject NaN/Inf and confirm conversion behavior
Int16 at ±1000 N±32000 counts: 0.03125 N/countIllustrative headroom policy, not full signed rangeVerify rounding, clipping and scale version
Int24 at ±1000 N±8000000 counts: 0.000125 N/countThree-byte packing and sign extension must matchTest positive, negative and saturation vectors
Int32 at ±1000 N±2000000000 counts: 0.0000005 N/countMore numeric precision does not recover ADC informationValidate host conversion and usable sensor noise floor

Source basis: Oracle Numerical Computation Guide — IEEE Arithmetic, single format. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

4. Reproduce the conservative wire-time allowance

Model v2, reviewed 2026-11-04: ISO CAN FD, 11-bit ID, BRS enabled, one frame per sample per node. For payload L bytes: nominal allowance = 35 bits; data allowance = (5 + 8L) + ceil((5 + 8L)/4) + C − 1, where C = 28 for L ≤ 16, otherwise 33. T = 35/Rnom + data/Rdata, with rates in Mbit/s and T in µs.

Conservative phase budget
Conservative phase budget35 nominal-rate bitsPayload + stuffing + CRCT = nominal/Rn + data/Rd

11-bit ISO CAN FD, BRS on; includes intermission, excludes waiting and retries.

4. Reproduce the conservative wire-time allowance — technical reference criteria
Decision / itemKnown or illustrative basisLimit / unknownNext action
Nominal allowance17 header + 5 stuff + 1 delimiter + 12 ACK/EOF/IFS = 35 bitsSeparately rounded stuffing deliberately over-budgets transitionsDo not treat it as a decoded bitstream
CRC fieldC includes fixed stuffing and delimiter; delimiter charged at nominal rateISO CAN FD only; no original non-ISO compatibility claimConfirm controller ISO mode
32 B at 1 / 5 Mbit/s261 dynamic bits + 66 stuffing + 32 CRC = 359 data bits; T = 106.8 µsNo retries, competing traffic or software delayCompare with an analyzer trace on target hardware
48 B at 1 / 5 Mbit/s389 + 98 + 32 = 519 data bits; T = 138.8 µsConservative allowance, not average latencyUse this default when timestamp and auxiliary fields are enabled

Source basis: Linux CAN frame length model — include/linux/can/length.h · CiA — Cyclic redundancy check in CAN frames. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

5. Interpret demand and headroom without a timing guarantee

Demand (%) = rate × sensor count × frame allowance (µs) / 10000. Values are not capped: demand above 100% cannot be scheduled. The 30/50/70% color bands are editorial review prompts, not standard-defined limits or safety acceptance criteria.

Requested sensor demand
Requested sensor demandRate × sensor countMultiply by frame allowanceDivide by available second

Demand above 100% cannot fit. Headroom does not guarantee a deadline.

5. Interpret demand and headroom without a timing guarantee — technical reference criteria
Decision / itemKnown or illustrative basisLimit / unknownNext action
Default 1 node × 1000 Hz48 B at 1 / 5 Mbit/s: 13.88% sensor demandAll other traffic excludedAdd commands, diagnostics and their priorities
2 nodes × 2000 Hz24 B at 1 / 4 Mbit/s: 41.9% sensor demandWire-only cycle balance = 290.5 µsCheck blocking, bursts and worst-case delivery
Over 100% demandFrames require more than the available secondQueues grow even without retransmissionsReduce rate or payload; split buses if needed
Low average utilizationStill permits blocking by an ongoing frameNo zero-jitter or emergency-stop guaranteeAnalyze response times and validate the separate safety path

Source basis: Linux CAN frame length model — include/linux/can/length.h · Linux kernel documentation — SocketCAN. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

Need to verify bus load for multi-sensor configurations?

Estimate sensor wire demand for up to 16 nodes on a shared trunk. Add other network traffic and analyze message priorities separately before assigning control deadlines.

Configure bus parameters ↗

6. Qualify controller, transceiver and cable together

A selected bit rate does not validate an assembled network. Keep an evidence register for actual part numbers, revisions, loading and environmental limits. The planner records geometry but does not certify topology.

Physical-layer evidence
Physical-layer evidenceController clock and timingTransceiver + cable dataWaveforms and error logs

Actual voltage and timing margins require device-specific validation.

6. Qualify controller, transceiver and cable together — technical reference criteria
Decision / itemKnown or illustrative basisLimit / unknownNext action
ControllerExact peripheral and reference clockBit-segment and oscillator limits unknownRecord achieved nominal/data rates and SJW
TransceiverActual CAN FD device and supplyDelay variation across voltage and temperature unknownUse rated delay and symmetry data, then measure
CablePlanner assumes 5 ns/m one-way propagationActual impedance, capacitance and connectors unknownObtain cable data and inspect end-node waveforms
Other nodesFD-capable and ISO-mode confirmationClassical-only nodes may disrupt FD trafficValidate every attached node or use isolated segments

Source basis: Bosch M_CAN user manual, revision 3.3.1 (2023), sections 3.1.4–3.1.4.2 · TI SLLA270 — Controller Area Network Physical Layer Requirements (2008). Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

7. Separate TDC from cable propagation

TDC compensates local transmitted-bit observation. A local delay longer than one data bit is not by itself evidence that TDC is non-functional. The planner deliberately reports SSP settings as unknown.

Local transmitter delay
Local transmitter delayLocal TXD edgeObserve local RXD edgeSSP: controller-specific

Cable propagation is analyzed separately. No register setting is generated.

7. Separate TDC from cable propagation — technical reference criteria
Decision / itemKnown or illustrative basisLimit / unknownNext action
Local loop delayTXD-to-RXD path at the transmitting nodeNot the remote cable round-trip delayMeasure or bound from device data
Cable propagation2 × length × 5 ns/m in this plannerNot substituted into the TDC registerInclude real propagation in network timing analysis
Bosch M_CAN exampleSSP uses measured local delay plus TDCORevision 3.3.1 has controller-specific range limitsRead section 3.1.4 and use actual controller clock quanta
Missing inputsClock, prescaler, segments and TDC limitsNo universal 70–80% SSP or mandatory 2 Mbit/s ruleHave firmware engineering validate the register configuration

Source basis: Bosch M_CAN user manual, revision 3.3.1 (2023), sections 3.1.4–3.1.4.2. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

8. Select termination and filtering from measurements

Standard end termination and split termination are both design options. Changing a capacitor or adding a choke changes the circuit and requires validation; neither guarantees suppression of differential ringing.

Termination and filtering
Termination and filteringMatch both trunk endsSelect optional filteringValidate edges and EMC

Neither split termination nor a choke automatically eliminates ringing.

8. Select termination and filtering from measurements — technical reference criteria
Decision / itemKnown or illustrative basisLimit / unknownNext action
Trunk endsNominal 120 Ω at each physical endInternal node terminators may create excess loadingConfirm two end terminations with power removed
Split optionTwo nominal 60 Ω resistors plus selected midpoint capacitorCapacitance and ground connection depend on designUse the transceiver reference circuit and EMC test plan
Common-mode chokeOptional common-mode filteringParasitics, saturation and delay can affect edgesCompare candidate parts and bypass configuration on the bench
Protection and isolationSelected TVS, reference and isolation conceptAdded capacitance and delay not modeledQualify signal integrity and transient behavior together

Source basis: TI — CAN physical layer (2019) · TI SLLA270 — Controller Area Network Physical Layer Requirements (2008). Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

9. Review trunk, stubs and robot cable motion

Short branches and a controlled return/reference path are useful starting points. The old 0.3 m high-speed CAN stub guideline is used only as a review trigger here; FD performance depends on the whole topology.

Cable topology review
Cable topology reviewRecord trunk and branchesReview return and shieldingTest moving harness

0.3 m is a review trigger, not universal FD topology certification.

9. Review trunk, stubs and robot cable motion — technical reference criteria
Decision / itemKnown or illustrative basisLimit / unknownNext action
Topology recordTrunk length, every stub and node locationNo universal maximum FD cable length computedDraw the actual network including adapters
Motor routingSeparate noisy power and signal routes where practicalShield bonding depends on chassis and ground strategyReview the complete installation with EMC engineering
Moving harnessBend radius, strain relief and connector retentionElectrical qualification does not prove flex lifeTest the representative motion cycle
Long cable optionTry lower data rate or a nearer interface gatewayNo guaranteed rate/length conversion tableRecalculate demand and remeasure waveforms

Source basis: TI SLLA270 — Controller Area Network Physical Layer Requirements (2008) · TI — CAN physical layer (2019). Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

10. Map acquisition timestamps into a common clock

A timestamp field helps identify when data was acquired only if firmware captures the agreed event. Sensor, adapter and host clocks are distinct. A timestamp does not itself synchronize sensors or remove network delay.

Timestamp clock mapping
Timestamp clock mappingIdentify acquisition eventMap offset, drift and resetCompare in a common clock

A 32-bit microsecond timer wraps after 4294.967296 seconds.

10. Map acquisition timestamps into a common clock — technical reference criteria
Decision / itemKnown or illustrative basisLimit / unknownNext action
Acquisition eventProposed capture at ADC completionMultiplexed axes may still have acquisition skewRequest channel timing and filter-delay evidence
32-bit µs timerWrap after 4294.967296 s (about 71.6 min)Reset can resemble wrap; rate drift remainsTrack sequence, boot identity and clock offset
Host receive timeTimestamp of a different eventHardware timestamp availability is adapter/driver dependentRecord event semantics and measured clock mapping
Multi-sensor fusionCommon trigger or clock synchronization plus drift limitsIndependent counters cannot be directly comparedMeasure inter-sensor alignment over temperature and time

Source basis: Linux kernel documentation — SocketCAN · Bosch M_CAN user manual, revision 3.3.1 (2023), sections 3.1.4–3.1.4.2. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

11. Validate stale-data handling and controlled recovery

Communication recovery and permission to resume force control are separate decisions. Agree fault behavior with the machine controller; the transport planner cannot validate a safety function.

Controlled fault recovery
Controlled fault recoveryInvalidate stale wrenchDiagnose and recover linkAuthorize control re-entry

Communication restart is separate from permission to resume motion.

11. Validate stale-data handling and controlled recovery — technical reference criteria
Decision / itemKnown or illustrative basisLimit / unknownNext action
Missing or duplicate recordSequence and age watchdogSequence alone cannot detect a frozen producerInvalidate stale wrench data and notify the controller
Bus-offCapture interface state and error countersImmediate repeated restart may hide wiring faultsPreserve logs and diagnose the physical/configuration cause
Restart policyLinux supports configurable automatic or manual restartNo universal restart-ms value recommendedUse a bounded recovery policy in the system state machine
Control re-entryRequire healthy recent data and application authorizationLink recovery alone is insufficientInject disconnect/reconnect faults on a controlled bench

Source basis: Linux kernel documentation — SocketCAN. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

12. Define status semantics and an acceptance record

Status and telemetry are proposed fields, not confirmed HexaForce capabilities. The following acceptance worksheet is an original commissioning method; numerical limits must come from the application.

Commissioning evidence
Commissioning evidenceKnown signal test vectorsTraffic and physical testsFault injection and archive

Set application-specific acceptance limits before testing.

12. Define status semantics and an acceptance record — technical reference criteria
Decision / itemKnown or illustrative basisLimit / unknownNext action
Protocol matchKnown positive/negative/zero test vectorsByte order, scale, sign and validity flags unconfirmedArchive firmware, schema version and decoded vectors
Traffic testRequired rates and realistic competing messagesWorst-case age and deadline are application specificMeasure max age, gaps and error counters under load
Physical testRepresentative cable, supply, temperature and motor noiseNo network qualification results suppliedSave waveforms and controller error logs
Fault testLoss, frozen sequence, timestamp wrap and bus-offSafe response and recovery criteria unconfirmedApprove limits before test; archive observed behavior

Source basis: Linux kernel documentation — SocketCAN · CiA — Cyclic redundancy check in CAN frames. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

13. Build a versioned SocketCAN acquisition path

This is an API checklist, not tested driver code. No Linux, adapter, firmware or ROS release has been qualified by this page. Pin deployment versions and measure under representative CPU and I/O load.

Versioned host acquisition
Versioned host acquisitionCheck FD mode and API errorsValidate ID, length and ageBound queues and benchmark

No target Linux, adapter or ROS release was qualified by this guide.

13. Build a versioned SocketCAN acquisition path — technical reference criteria
Decision / itemKnown or illustrative basisLimit / unknownNext action
Enable FD receptionCheck CAN_RAW_FD_FRAMES and each API returnNot every interface supports FD modeVerify MTU and achieved interface bit timing
Decode received recordsDistinguish CAN_MTU and CANFD_MTUReceived frame type and payload length must be checkedReject unexpected IDs, lengths and invalid numerical values
Timestamp and queuesIdentify capture source; monitor receive lossBuffer size is not a portable frame-count or latency guaranteeMeasure age distribution, overflow and sustained throughput
Control handoffBounded queue, latest valid sample and watchdogPriority settings do not guarantee a microsecond deadlineBenchmark the complete acquisition-to-control path

Source basis: Linux kernel documentation — SocketCAN. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

14. Keep illustrative DBC mapping separate from CANopen FD

A database describes a chosen signal layout; it does not supply a higher-layer protocol implementation. Request the actual firmware-matched schema before integrating a decoder or a ROS bridge.

Schema and protocol review
Schema and protocol reviewAgree raw byte layoutValidate decoder vectorsConfirm higher-layer support

A DBC does not implement or certify CANopen FD compatibility.

14. Keep illustrative DBC mapping separate from CANopen FD — technical reference criteria
Decision / itemKnown or illustrative basisLimit / unknownNext action
Default layout proposalStatus 0–1; sequence 2–3; timestamp 4–7; axes 8–31Auxiliary values 32–35; padding 36–47 in the 48 B defaultAgree little-endian encoding and float metadata with the chosen decoder
Integer mappingSame order, different channel widthsPer-axis factors and sign extension not in a generic byte offsetUse versioned reference vectors in both host and firmware
CANopen FDCiA 1301 higher-layer protocolRaw CAN FD frames do not demonstrate stack/profile supportConfirm object dictionary, profile and release compatibility
End-to-end protectionSequence, age and optional application CRC by agreementNo CRC-8 field is reserved by this illustrative layoutDefine coverage, polynomial and failure response if an E2E scheme is required

Source basis: CiA — Standardized higher-layer protocols · CiA — Cyclic redundancy check in CAN frames. Tables, bit calculations, and framing architectures are original engineering interpretations. Sources support the stated mechanisms, not measured HexaForce performance or product compatibility.

15. Six Illustrative Integration Scenarios

Planning examples for collaborative robots, dual-arm teleoperation, humanoid biped walking, and subsea ROVs. These are reproducible planning examples, not observed customer results or qualified product configurations.

Single wrist: establish a baseline

Operational Premise: Illustrative 1 node, 1 kHz, Float32, timestamp and auxiliary telemetry, 1 / 5 Mbit/s.

Bus Configuration & Technical Discovery: 36 B of fields require a 48 B payload. Model allowance is 138.8 µs/frame and demand is 13.88%.

Decision & Remaining Validation: Wire capacity is plausible; collect actual arbitration, acquisition age and physical-layer evidence before commissioning.

Dual wrist: compact encoding

Operational Premise: Illustrative 2 nodes, 2 kHz, Int16, timestamp and auxiliary values in 24 B at 1 / 4 Mbit/s.

Bus Configuration & Technical Discovery: 24 B fits exactly. Frame allowance is 104.75 µs; sensor demand is 41.9%; wire-only balance is 290.5 µs/cycle.

Decision & Remaining Validation: Compare 0.03125 N/count at an example ±1000 N span with measured sensor noise; measure delivery deadlines.

Humanoid trunk: expose an invalid preset

Operational Premise: Illustrative four sensors at 500 Hz, Float32 with timestamp and telemetry, initially 32 B.

Bus Configuration & Technical Discovery: Requested fields total 36 B, so no valid map exists. Increase to 48 B; at 0.5 / 2 Mbit/s the allowance is 329.5 µs.

Decision & Remaining Validation: Demand becomes 65.9%. Redesign traffic or split trunks if application response-time analysis fails.

ROV: lower-rate cable experiment

Operational Premise: Illustrative 25 m trunk, one node at 250 Hz, Float32 plus timestamp; disable auxiliary values to fit 32 B.

Bus Configuration & Technical Discovery: At 0.5 / 1 Mbit/s the model allowance is 429 µs and demand is 10.725%. Record real cable and transceiver characteristics.

Decision & Remaining Validation: This is a test candidate, not proof that the cable works. Qualify waveform margins and common-mode conditions.

Stress case: show impossible demand

Operational Premise: Illustrative 4 nodes at 4 kHz, 48 B, 0.5 / 2 Mbit/s.

Bus Configuration & Technical Discovery: 329.5 µs/frame gives 527.2% demand and a −1068 µs wire-only cycle balance. The display must retain the uncapped demand.

Decision & Remaining Validation: The schedule cannot fit. Reduce rate/node count, redesign payload or provide separate buses before bench testing.

Foot fusion: verify the clock model

Operational Premise: Illustrative two 2 kHz ankle streams with independent 32-bit microsecond counters.

Bus Configuration & Technical Discovery: Record acquisition events, offset and drift against a common reference; test wrap after 4294.967296 s and sensor reset.

Decision & Remaining Validation: A shared frame format does not prove synchronized samples. Establish alignment tolerances before using fused contact estimates.

16. Frequently Asked Questions

Framing, Scaling & Data Types

Does CAN FD require 64-byte frames?

No. This planner offers 16, 24, 32, 48 and 64 B payload lengths. Choose a supported length that fits all requested fields; these are byte lengths, not raw DLC codes.

Why does the default use 48 B?

Six Float32 values plus status, sequence, timestamp and 4 B auxiliary telemetry total 36 B. The next supported length is 48 B. Disable auxiliary telemetry to fit 32 B.

Does Float32 establish 140 dB sensor performance?

No. Binary32 precision describes number representation. Sensor noise, usable resolution, calibration and dynamic range need separate measurements.

How is Int16 scaled?

The example uses ±span at ±32000 counts with zero offset. That policy is illustrative; agree actual per-axis scales, clipping and units with firmware engineering.

Are six values in one frame simultaneous?

The record arrives atomically at transport level. Simultaneous acquisition depends on ADC architecture, capture timing and filtering.

Is the byte map a released HexaForce DBC?

No. It is an illustrative little-endian layout. Request a firmware-matched specification and verify the host decoder against known vectors.

Baud Rates, Bit Timing & Bus Load

Is the displayed frame time measured?

No. It is a conservative wire-time allowance for an 11-bit ISO CAN FD frame with BRS on and intermission. The method and worked numbers are shown in section 4.

Does the model include stuffing?

Yes, a conservative separately rounded dynamic-stuffing allowance and the fixed CRC-field stuffing. It does not construct actual payload bits or model transition sample points exactly.

Why can demand exceed 100%?

It represents requested sensor traffic. More than 100% means the requested frames cannot fit even before other traffic and retries. Capping the value would hide the amount of overload.

Is 30% a standard-defined real-time limit?

No. The 30/50/70% bands are planning prompts. Deadline guarantees require message priorities, blocking analysis, competing traffic and measured platform delays.

Does cycle balance equal a control deadline margin?

No. It subtracts sensor wire allowances only. ADC, filtering, queues, arbitration and controller execution still consume time.

Is 1 Mbit/s data mode Classical CAN?

No. CAN FD with equal nominal/data rates retains FD framing. A Classical-only controller is not made FD-compatible by using the same rate.

Physical Layer, Wiring, Termination & EMI

What maximum cable length does this tool certify?

None. It records lengths and shows propagation using an assumed 5 ns/m. Actual limits depend on components, loading, timing, cable and environment.

Is a stub over 0.3 m automatically non-compliant?

This planner uses 0.3 m only as a review trigger from legacy high-speed CAN guidance. Shorter branches can also fail; validate the actual FD topology.

Is split termination mandatory at 5 Mbit/s?

No universal requirement is established here. Both standard and split termination need selection and testing in the actual transceiver and network design.

Will a 51 µH choke eliminate ringing?

No such guarantee is justified. Chokes target common-mode interference and have parasitic effects. Select and qualify the actual component rather than inductance alone.

Can the planner set TDC registers?

No. It lacks controller clock, prescaler, segments and range limits. Use the actual controller manual and measured local TXD-to-RXD delay.

Does TDC use the cable round-trip delay?

TDC observes the transmitting node’s local TXD-to-RXD path. Network cable propagation has a separate role in timing analysis and is not a substitute for that measurement.

Timestamps, Real-Time ROS2 & Error Recovery

Does a hardware timestamp synchronize two sensors?

No. Define the capture event, shared epoch or synchronization method, offset and drift bounds before comparing independent counters.

How often does a 32-bit microsecond counter wrap?

Every 4294.967296 seconds, about 71.6 minutes. Track wrap and reset explicitly; modular subtraction alone cannot distinguish all resets or long gaps.

Does this page certify a Linux or ROS version?

No deployed kernel, adapter firmware, ROS distribution or driver has been qualified here. Record exact versions and run the commissioning worksheet.

Does PREEMPT_RT guarantee less than 15 µs latency?

No portable bound is established. Benchmark the actual hardware, driver, CPU load and control path; socket priorities and buffers are only part of that system.

Should force control resume immediately after bus-off?

No automatic control-resume policy is implied. Diagnose the fault, apply controlled communication recovery, and require valid recent data plus application authorization.

What should I send for an engineering review?

Provide controller and firmware versions, rates, node count, traffic/priority list, topology, required units/scales, timestamp semantics and acceptable data age. Copy the planner memo as a starting point.

17. Sources, Review Date and Limitations

Authored and reviewed by HexaForce Metrology & Robotics. Technical integration guide formally established ; public sources rechecked and planning model reviewed . Next scheduled review: , or sooner when the framing model, source APIs or configuration release evidence changes. Public publication date has not been independently verified.

References below were checked on November 4, 2026. The scope is ISO CAN FD framing, controller-specific TDC guidance and public acquisition APIs. This page does not establish compliance with a current standards edition or qualify hardware, firmware, Linux or ROS releases. The calculator is a conservative planning model, not a bit-accurate simulator or a control-safety assessment. CAN FD remains a HexaForce engineering configuration target: request the actual firmware, DBC and pinout before commissioning. The proposed status flags and telemetry are unconfirmed.

Fieldbus integration connects with multi-axis calibration and coordinate transformations. To verify coordinate sign polarities and right-hand rules, visit 6-axis force sensor sign convention verification, or explore analog readout alternatives with the analog output acquisition calculator.

Need Custom CAN FD DBC Files or Multi-Sensor Topology Review?

Send us your robot controller model (e.g. ROS 2, Beckhoff TwinCAT, Keba, or custom Linux RT-PREEMPT), required update rate, and cable drag-chain length. Request a configuration-specific review of firmware availability, CAN FD timing, DBC definitions and wiring. Deliverables and compatibility require confirmation for the proposed hardware.

Related engineering resources: digital interfaces & mounting kits, cable force compensation modeling, or all engineering resources.

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